The concept of doing more than one data processing operation at the same time and/or the concept of not waiting until a particular data processing operation is finished before starting a subsequent data processing operation, is not new in the data processing art. One such popular example of structure permitting concurrent operations, or nearly concurrent operations, is that of a pipeline system, which has a plurality of registers interspersed, along a path, in between pairs of data manipulation circuits. In such systems, data entering a first data manipulation circuit would be operated thereupon and then stored in a first register immediately downstream from said first data manipulation circuit.
In a subsequent next period of time, information from said first register would be transmitted to a second data manipulation circuit whereat a second data processing operation would take place. Then the results would be stored in a second register device which is located immediately downstream from said second data manipulation circuit. In that same time frame, or in very nearly that same time frame, the first data manipulation circuit would perform a data operation on a second data word and then store the results in said first register. As the words advance along the data path, i.e., along the pipeline, into and out of the data manipulation circuits and into and out of the interspersed registers, many operations are accomplished either simultaneously or very nearly simultaneously. However, if any particular operation on a data word takes longer than an intended concurrent operation on a second, or subsequent, data word then the data manipulation circuit handling the second data word has to halt its operation, or at least not store its results, until the first operation is completed. Such an interruption of the operation at any stage causes a wave-like halting effect on all of the upstream stages and the desired concurrent operations are diminished or even nullified.
A major part of accomplishing an operation, in an electronic data processing system, is related to fetching data words from memory for use in data processing operations. For instance, fetching an instruction from memory, analyzing the information contained in the instruction, and fetching operands to be manipulated in accordance with the analysis of the instruction information is normally required to accomplish a program step. When the data words have been brought from memory and staticized, or made ready, then the execution circuitry, or execution equipment, can manipulate the operands, store the results, and get ready for manipulating the next set of data words. In a pipeline operation, part of the effort is directed to making the data words ready for a later manipulation. Hence if the pipeline operation is slowed down, or impeded, as described above, the time to get the data words ready for manipulation is increased, when compared with a lessor amount of time that might have been necessary, had there been no impediments along the pipeline data path. In the present invention the data words are made ready for use in a manipulation and are either directly used in that manipulation or are temporarily stored. The tag information associated with the data words improves the system's ability to store such data words and improves the system's ability to get rapid access of such data words.